RTL

Sequence detector with timeout

mediumControl Logic -> FSM DesignFSMETA: 18 min

Build an FSM that detects a programmable bit sequence, times out if the stream stalls, and restarts cleanly after a match or timeout.

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Problem Statement

Build an FSM that detects a programmable bit sequence, times out if the stream stalls, and restarts cleanly after a match or timeout.

Scoring

States, timeout

What to deliver

  • Compilable RTL / UVM / spec as applicable
  • Brief note on trade-offs and timing or coverage assumptions
  • Waveform or log for at least one passing test